herunterladen
![](https://oss-datasheet.aipcba.com/html/D8770DBF2FF07A6E1C59B6DB4B5B4F61/bg1.png)
1999-2011 Microchip Technology Inc. DS21034F-page 1
MCP3202
Features
• 12-bit resolution
• ±1 LSB maximum DNL
• ±1 LSB maximum INL (MCP3202-B)
• ±2 LSB maximum INL (MCP3202-C)
• Analog inputs programmable as single-ended or
pseudo-differential pairs
• On-chip sample and hold
• SPI Serial Interface (Modes 0,0 and 1,1)
• Single supply operation: 2.7V-5.5V
• 100 ksps maximum sampling rate at V
DD
=5V
• 50 ksps maximum sampling rate at V
DD
=2.7V
• Low power CMOS technology
• 500 nA typical standby current, 5 µA maximum
• 550 µA maximum active current at 5V
• Industrial temp range: -40°C to +85°C
• 8-pin MSOP, PDIP, SOIC and TSSOP packages
Applications
• Sensor Interface
• Process Control
• Data Acquisition
• Battery Operated Systems
Functional Block Diagram
Description
The MCP3202 is a successive approximation 12-bit
analog-to-digital (A/D) converter with on-board sample
and hold circuitry.
The MCP3202 is programmable to provide a single
pseudo-differential input pair or dual single-ended
inputs. Differential Nonlinearity (DNL) is specified at
±1 LSB, and Integral Nonlinearity (INL) is offered in
±1 LSB (MCP3202-B) and ±2 LSB (MCP3202-C)
versions.
Communication with the device is done using a simple
serial interface compatible with the SPI protocol. The
device is capable of conversion rates of up to 100 ksps
at 5V and 50 ksps at 2.7V.
The MCP3202 operates over a broad voltage range,
2.7V to 5.5V. Low-current design permits operation with
typical standby and active currents of only 500 nA and
375 µA, respectively.
The MCP3202 is offered in 8-pin MSOP, PDIP, TSSOP
and 150 mil SOIC packages.
Package Types
Comparator
Sample
and
Hold
12-Bit SAR
DAC
Control Logic
CS/SHDN
V
SS
V
DD
CLK D
OUT
Shift
Register
CH0
Channel
Mux
Input
CH1
D
IN
MCP3202
1
2
3
4
8
7
6
5
CH0
CH1
V
SS
CS/SHDN
V
DD
/V
REF
CLK
D
OUT
D
IN
PDIP, MSOP, SOIC, TSSOP
2.7V Dual Channel 12-Bit A/D Converter
with SPI Serial Interface
Verzeichnis