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DS21554LN+ Programmierhandbuch - Maxim Integrated

  • Hersteller:
    Maxim Integrated
  • Kategorie:
    Interface IC, Interface Controller
  • Fallpaket
    LQFP-100
  • Beschreibung:
    PCM Transceiver, 1-Func, CEPT PCM-30/E-1, CMOS, PQFP100, 14 X 14MM, ROHS COMPLIANT, LQFP-100
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DS21554LN+ Programmierhandbuch

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Maxim > Design Support > Technical Documents > Application Notes > T/E Carrier and Packetized > APP 342
Keywords: framer, single chip transceivers, SCTs, T1, E1, initialization, programming
APPLICATION NOTE 342
T1/E1 Framer Initialization and Programming
Aug 10, 2001
Abstract: This application note highlights the initialization and programming of Maxim framers.
Introduction
This application note shows how to initialize and program Maxim T1/E1 framers. The DS2155, DS21Q55,
and DS2156 do not require any special initialization after power-up, since they automatically initialize
themselves by clearing and setting the proper registers.
General Initialization
After power-up, when supplies and clocks have stabilized, internal registers must be initialized. Please
note the DS2155, DS21Q55, and DS2156 do NOT require any special initialization whatsoever since
they automatically initialize upon power-up. It is a good idea to clearµset to 0x00µALL R/W registers.
The easiest way to do this is to write 0x00 to address space 0x00-0xFF, regardless of register type.
Certain registers have bits that control special test modes and features that can provide confusing
indications (Table 1).
Table 1. Registers with Special Test Modes and Features
Part Name
DS2151 TEST, TCR2, LICR
DS2152 TEST1, TEST2, TCR2, LICR
DS21352/552 TEST1, TEST2, TCR2, LICR
DS21Q41/Q42 TEST, TCR2
DS21FF/FT42 TEST1, TCR2
DS2153 TEST1, TEST2, LICR
DS2154 TEST1, TEST2, LICR
DS21354/554 TEST1, TEST2, TCR2, LICR
DS21Q43/Q44 TEST1, TEST2
DS21FF/FT44 TEST1, TEST2
Depending on the interrupt structure implemented, it may be a good idea to clear IMR1 and IMR2 first.
Prior to clearing these two registers, spurious interrupt signals may occur without an external interrupt
disable.
Page 1 of 7

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