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CY8C20XX6A/S
1.8 V Programmable CapSense
®
Controller with
SmartSense™ Auto-tuning 1–33 Buttons, 0–6 Sliders
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document Number: 001-54459 Rev. *W Revised July 7, 2015
1.8 V Progra mmable CapS ense
®
Controller w ith SmartSense™ Auto-tuning 1–33 Buttons, 0–6 Sliders
Features
■ Low power CapSense
®
block with SmartSense Auto-tuning
❐ Patented CSA_EMC, CSD sensing algorithms
❐ SmartSense_EMC Auto-Tuning
• Sets and maintains optimal sensor performance during run
time
• Eliminates system tuning during development and
production
• Compensates for variations in manufacturing process Low
average power consumption – 28 µA/sensor in run time
(wake-up and scan once every 125 ms)
■ Powerful Harvard-architecture processor
❐ M8C CPU with a max speed of 24 MHz
■ Operating Range: 1.71 V to 5.5 V
❐ Standby Mode 1.1 μA (Typ)
❐ Deep Sleep 0.1 μA (Typ)
■ Operating Temperature range: –40 °C to +85 °C
■ Flexible on-chip memory
❐ 8 KB flash, 1 KB SRAM
❐ 16 KB flash, 2 KB SRAM
❐ 32 KB flash, 2 KB SRAM
❐ Read while Write with EEPROM emulation
❐ 50,000 flash erase/write cycles
❐ In-system programming simplifies manufacturing process
■ Four Clock Sources
❐ Internal main oscillator (IMO): 6/12/24 MHz
❐ Internal low-speed oscillator (ILO) at 32 kHz for watchdog
and sleep timers
❐ External 32 KHz Crystal Oscillator
❐ External Clock Input
■ Programmable pin configurations
❐ Up to 36 general-purpose I/Os (GPIOs) configurable as
buttons or sliders
❐ Dual mode GPIO (Analog inputs and Digital I/O supported)
❐ High sink current of 25 mA per GPIO
• Max sink current 120 mA for all GPIOs
❐ Source Current
• 5 mA on ports 0 and 1
• 1 mA on ports 2,3 and 4
❐ Configurable internal pull-up, high-Z and open drain modes
❐ Selectable, regulated digital I/O on port 1
❐ Configurable input threshold on port 1
■ Versatile Analog functions
❐ Internal analog bus supports connection of multiple sensors
to form ganged proximity sensor
❐ Internal Low-Dropout voltage regulator for high power supply
rejection ratio (PSRR)
■ Full-Speed USB
❐ 12 Mbps USB 2.0 compliant
■ Additional system resources
❐ I2C Slave:
• Selectable to 50 kHz, 100 kHz, or 400 kHz
❐ Configurable up to 12 MHz SPI master and slave
❐ Three 16-bit timers
❐ Watchdog and sleep timers
❐ Integrated supervisory circuit
❐ 10-bit incremental analog-to-digital converter (ADC) with
internal voltage reference
❐ Two general-purpose high speed, low power analog
comparators
■ Complete development tools
❐ Free development tool (PSoC Designer™)
■ Sensor and Package options
❐ 10 Sensors – QFN 16, 24
❐ 16 Sensors – QFN 24
❐ 22 / 25 Sensors – QFN 32
❐ 24 Sensors - WLCSP 30
❐ 31 Sensors – SSOP 48
❐ 33 Sensors – QFN 48
Errata: For information on silicon errata, see “Errata” on page 46. Details include trigger conditions, devices affected, and proposed workaround.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 10 Seite 11 Seite 12 Seite 13 Seite 14
- ・ Abmessungen des Paketumrisses on Seite 35 Seite 36 Seite 37
- ・ Teilenummerierungssystem on Seite 41 Seite 42 Seite 43
- ・ Blockdiagramm on Seite 2 Seite 5
- ・ Schweißen Temperatur on Seite 38
- ・ Beschreibung der Funktionen on Seite 41 Seite 42 Seite 43
- ・ Technische Daten on Seite 20 Seite 21 Seite 22 Seite 23 Seite 24
- ・ Elektrische Spezifikation on Seite 20 Seite 25
