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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV320DAC3100
SLAS671B –FEBRUARY 2010–REVISED APRIL 2016
TLV320DAC3100 Low-Power Stereo Audio DAC With Audio Processing
and Mono Class-D Speaker Amplifier
1 Device Overview
1
1.1 Features
1
• Stereo Audio DAC with 95-dB SNR
• Supports 8-kHz to 192-kHz Sample Rates
• Mono Class-D BTL Speaker Driver (2.5 W Into 4-Ω
or 1.6 W Into 8-Ω)
• Two Single-Ended Inputs With Mixing and Output
Level Control
• Stereo Headphone/Lineout and Mono Class-D
Speaker Outputs Available
• Microphone Bias
• Headphone Detection
• 25 Built-in Digital Audio Processing Blocks
(PRB_P1 – PRB_P25) Providing Biquad and FIR
Filters, DRC, and 3-D Structures
• Digital Mixing Capability
• Pin Control or Register Control for Digital-Playback
Volume-Control Settings
• Digital Sine-Wave Generator for Beeps and Key
Clicks (PRB_P25)
• Programmable PLL for Flexible Clock Generation
• I
2
S, Left-Justified, Right-Justified, DSP, and TDM
Audio Interfaces
• I
2
C Control With Register Auto-Increment
• Full Power-Down Control
• Power Supplies:
– Analog: 2.7 V–3.6 V
– Digital Core: 1.65 V–1.95 V
– Digital I/O: 1.1 V–3.6 V
– Class-D: 2.7 V–5.5 V (SPKVDD ≥ AVDD)
• 5-mm × 5-mm 32-VQFN Package
1.2 Applications
• Portable Audio Devices
• Mobile Internet Devices
• eBooks
1.3 Description
The TLV320DAC3100 device is a low-power, highly integrated, high-performance stereo audio DAC with 24-bit
stereo playback and digital audio processing blocks.
The device integrates headphone drivers and speaker drivers. The mono speaker driver can drive loads down to
4 Ω. The TLV320DAC3100 device has a suite of built-in processing blocks for digital audio processing. The
digital audio data format is programmable to work with popular audio standard protocols (I
2
S, left/right-justified) in
master, slave, DSP, and TDM modes. Bass boost, treble, or EQ can be supported by the programmable digital
signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing
block. The volume level can be controlled either by pin control or by register control. The audio functions are
controlled using the I
2
C serial bus.
The TLV320DAC3100 device has a programmable digital sine-wave generator and is available in a 32-pin VQFN
package.
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TLV320DAC3100 VQFN (32) 5.00 mm × 5.00 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 6 Seite 7
- ・ Abmessungen des Paketumrisses on Seite 103 Seite 104 Seite 105 Seite 109
- ・ Paket-Footprint-Pad-Layout on Seite 110
- ・ Markierungsinformationen on Seite 103
- ・ Blockdiagramm on Seite 2 Seite 20
- ・ Typisches Anwendungsschaltbild on Seite 96
- ・ Technische Daten on Seite 8 Seite 9 Seite 10 Seite 11 Seite 12
- ・ Anwendungsbereich on Seite 1 Seite 114
- ・ Elektrische Spezifikation on Seite 9 Seite 10
