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© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 19
1 Publication Order Number:
MC100LVELT23/D
MC100LVELT23
3.3V Dual Differential
LVPECL/LVDS to LVTTL
Translator
Description
The MC100LVELT23 is a dual differential LVPECL/LVDS to
LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels
are used only +3.3 V and ground are required. The small outline 8-lead
package and the dual gate design of the LVELT23 makes it ideal for
applications which require the translation of a clock and a data signal.
The LVELT23 is available in only the ECL 100K standard. Since
there are no LVPECL outputs or an external V
BB
reference, the
LVELT23 does not require both ECL standard versions. The LVPECL
inputs are differential. Therefore, the MC100LVELT23 can accept any
standard differential LVPECL input referenced from a V
CC
of +3.3 V.
Features
• 2.0 ns Typical Propagation Delay
• Maximum Frequency > 180 MHz
• Differential LVPECL Inputs
• PECL Mode Operating Range:V
CC
= 3.0 V to 3.8 V
with GND = 0 V
• 24 mA LVTTL Outputs
• Flow Through Pinouts
• Internal Pulldown and Pullup Resistors
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
MARKING DIAGRAMS*
KR23
ALYWG
G
SOIC−8 NB
D SUFFIX
CASE 751−07
1
8
TSSOP−8
DT SUFFIX
CASE 948R−02
1
8
1
8
www.onsemi.com
KVT23
ALYW
G
1
8
DFN−8
MN SUFFIX
CASE 506AA
4J M G
G
14
(Note: Microdot may be in either location)
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M
= Date Code
G = Pb-Free Package
1
SOIC−8 TSSOP−8 DFN−8
*For additional marking information, refer to
Application Note AND8002/D
.
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
.
ORDERING INFORMATION
Device Package Shipping
†
MC100LVELT23DG SOIC−8 NB
(Pb-Free)
98 Units/Tube
MC100LVELT23DR2G SOIC−8 NB
(Pb-Free)
2500/Tape & Reel
TSSOP−8
(Pb-Free)
MC100LVELT23DTRG 2500/Tape & Reel
TSSOP−8
(Pb-Free)
MC100LVELT23DTG 100 Units/Tube
DFN−8
(Pb-Free)
MC100LVELT23MNRG 1000/Tape & Reel
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 2
- ・ Abmessungen des Paketumrisses on Seite 6 Seite 7 Seite 8
- ・ Paket-Footprint-Pad-Layout on Seite 6 Seite 8
- ・ Teilenummerierungssystem on Seite 1 Seite 8
- ・ Markierungsinformationen on Seite 1 Seite 5 Seite 8
- ・ Typisches Anwendungsschaltbild on Seite 2
- ・ Technische Daten on Seite 1
- ・ Teilenummernliste on Seite 3
