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August 2013 Altera Corporation
AN-466-2.2 Application Note
© 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS,
QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark
Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their
respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor
products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use
of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are
advised to obtain the latest version of device specifications before relying on any published information and before placing orders
for products or services.
101 Innovation Drive
San Jose, CA 95134
www.altera.com
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Cyclone III Design Guidelines
This document summarizes the various aspects of the Cyclone III device, and
highlights the Quartus
®
II software features that you should consider when you are
designing with the Cyclone III devices. With good design practice and clear
understanding of the design flow of the Cyclone III device, your design flow will be
much easier.
This document covers the following topics:
“Device Selection” on page 1
“Early System Planning” on page 3
“Board Design Considerations” on page 16
“Design and Compilation” on page 28
“Verification” on page 45
“Design Debugging” on page 56
“Testing” on page 56
“Other Considerations” on page 57
Device Selection
This section provides the information for you to consider when selecting a Cyclone III
device for your system.
Device Feature Consideration
The Cyclone III device family offers from over 5,000 logic elements (LEs) to nearly
120,000 LEs and is suitable for a wide range of applications.
Always choose a device that has more LEs than the estimated count for your design
requirements:
You will have extra LEs if you want to upgrade or expand your design.
Consider having additional LEs and memories for debugging purposes.
Additional resources allow more flexibility with the Quartus II software for
optimizing placement and routing for maximum performance, lower power
consumption or both.
f For the number of LEs and other resource counts of the Cyclone III devices, refer to
the Cyclone III Device Family Overview chapter in the Cyclone III Device Handbook.
Verzeichnis

EP3C16Q240C8N Datenblatt-PDF

EP3C16Q240C8N Datenblatt PDF
Altera
8 Seiten, 407 KB
EP3C16Q240C8N Benutzerreferenzhandbuch
Altera
64 Seiten, 873 KB
EP3C16Q240C8N Anderes Datenblatt
Altera
78 Seiten, 671 KB
EP3C16Q240C8N Eigenschaften Beschreibung Parameter
Altera
15 Seiten, 415 KB
EP3C16Q240C8N Verpackung
Altera
8 Seiten, 115 KB
EP3C16Q240C8N Produktkatalog
Altera
8 Seiten, 443 KB

EP3C16Q240C8 Datenblatt-PDF

EP3C16Q240C8
Datenblatt PDF
Altera
FPGA Cyclone III Family 15408 Cells 402MHz 65nm Technology 1.2V 240Pin PQFP
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Intel
IC FPGA 160 I/O 240QFP
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Altera
Field Programmable Gate Array, 15408 CLBs, 472.5MHz, 15408-Cell, CMOS, PQFP240, 34.60 X 34.6MM, 4.1MM HEIGHT, 0.5MM PITCH, PLASTIC, LEAD FREE, QFP-240
EP3C16Q240C8N
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Intel
IC FPGA 160 I/O 240QFP
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KEMET Corporation
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