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AD5310RBRMZ-RL7
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AD5310RBRMZ-RL7 Benutzerreferenzhandbuch

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10-Bit nanoDAC with SPI/I
2
C Interface
and 2 ppm/°C On-Chip Reference
Data Sheet
AD5310R/AD5311R
Rev. B
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©20142017 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
High relative accuracy (INL): ±0.5 LSB maximum
Low drift 2.5 V reference: 2 ppm/°C typical
Selectable span output: 2.5 V or 5 V
Total unadjusted error (TUE): 0.06% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.05% of FSR maximum
Low glitch: 0.1 nV-sec
High drive capability: 20 mA
Low power: 1.2 mW at 3.3 V
Independent logic supply: 1.8 V logic compatible
Wide operating temperature range: −40°C to +105°C
Robust 4 kV HBM ESD protection
APPLICATIONS
Process controls
Data acquisition systems
Digital gain and offset adjustment
Programmable voltage sources
Optical modules
GENERAL DESCRIPTION
The AD5310R/AD5311R, members of the nanoDAC® family, are
low power, single-channel, 10-bit buffered voltage output DACs.
The devices include an enabled by default internal 2.5 V
reference, and provides 2 ppm/°C. The output span can be
programmed to be 0 V to V
REF
or 0 V to 2 × V
REF
. All devices
operate from a single 2.7 V to 5.5 V supply and are guaranteed
monotonic by design. The devices are available in 10-lead
MSOP packages.
The internal power-on reset circuit of the AD5310R/AD5311R
ensures that the DAC register is written to zero scale at powerup
when the internal output buffer is configured in normal mode.
The devices contain a power-down mode that reduces the
current consumption of the device to 2 µA at 5 V.
The AD5310R/AD5311R use a versatile SPI or I
2
C interface,
including an asynchronous
RESET
pin and a V
LOGIC
pin that
provides 1.8 V compatibility.
FUNCTIONAL BLOCK DIAGRAMS
AD5310R
V
REF
GND
LDAC
REF
V
DD
V
LOGIC
DAC
REGISTER
POWER-ON
RESET
2.5V
REF
OUTPUT
BUFFER
10-BIT
DAC
INPUT
CONTROL LOGIC
V
OUT
RESET
SYNC SCLK SDI
RESISTOR
NETWORK
POWER-DOWN
CONTROL LOGIC
11956-001
Figure 1. AD5310R
AD5311R
V
REF
GND
LDAC
REF
V
DD
V
LOGIC
DAC
REGISTER
POWER-ON
RESET
2.5V
REF
OUTPUT
BUFFER
10-BIT
DAC
INPUT
CONTROL LOGIC
V
OUT
RESET
SDA SCL A0
RESISTOR
NETWORK
POWER-DOWN
CONTROL LOGIC
11956-002
Figure 2. AD5311R
Table 1. Related Devices
Interface Reference 12-Bit 10-Bit
SPI External AD5681R AD5310
1
I
2
C External AD5311
1
1
The AD5310R and AD5311R are not pin-to-pin or software compatible with
the AD5310 and AD5311, respectively.
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL): ±0.5 LSB maximum.
2. Low Drift 2.5 V On-Chip Reference: 5 ppm/°C maximum
temperature coefficient.
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