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1. General description
PTN3460I is an (embedded) DisplayPort to LVDS bridge device that enables connectivity
between an (embedded) DisplayPort (eDP) source and LVDS display panel. It processes
the incoming DisplayPort (DP) stream, performs DP to LVDS protocol conversion and
transmits processed stream in LVDS format.
PTN3460I has two high-speed ports: Receive port facing DP Source (for example,
CPU/GPU/chip set), Transmit port facing the LVDS receiver (for example, LVDS display
panel controller). The PTN3460I can receive DP stream at link rate 1.62 Gbit/s or
2.7 Gbit/s and it can support 1-lane or 2-lane DP operation. It interacts with DP source via
DP Auxiliary (AUX) channel transactions for DP link training and setup.
It supports single bus or dual bus LVDS signaling with color depths of 18 bits per pixel or
24 bits per pixel and pixel clock frequency up to 112 MHz. The LVDS data packing can be
done either in VESA or JEIDA format. Also, the DP AUX interface transports
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C-over-AUX commands and support EDID-DDC communication with LVDS panel. To
support panels without EDID ROM, the PTN3460I can emulate EDID ROM behavior
avoiding specific changes in system video BIOS.
PTN3460I is suitable for industrial design due to its wide temperature range of 40 C to
+85 C.
PTN3460I provides high flexibility to optimally fit under different platform environments. It
supports three configuration options: multi-level configuration pins, DPAUX interface, and
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C-bus interface.
PTN3460I can be powered by either 3.3 V supply only or dual supplies (3.3 V/1.8 V) and
is available in the HVQFN56 7 mm 7 mm package with 0.4 mm pitch.
2. Features and benefits
2.1 Device features
Embedded microcontroller and on-chip Non-Volatile Memory (NVM) allow for flexibility
in firmware updates
LVDS panel power-up (/down) sequencing control
Firmware controlled panel power-up (/down) sequence timing parameters
No external timing reference needed
EDID ROM emulation to support panels with no EDID ROM. Emulation ON/OFF is set
via configuration pin CFG4 (see Table 14
for more details)
Supports EDID structure v1.3
On-chip EDID emulation up to seven different EDID data structures
PTN3460I
eDP to LVDS bridge for industrial and embedded applications
Rev. 2 — 19 December 2014 Product data sheet
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 6 Seite 7 Seite 8 Seite 9
- ・ Abmessungen des Paketumrisses on Seite 6 Seite 29
- ・ Teilenummerierungssystem on Seite 4
- ・ Blockdiagramm on Seite 5 Seite 9
- ・ Schweißen Temperatur on Seite 30 Seite 31
- ・ Beschreibung der Funktionen on Seite 1 Seite 9
- ・ Technische Daten on Seite 36
- ・ Anwendungsbereich on Seite 3 Seite 36
