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M48T08-100PC1
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M48T08-100PC1 Anwendungshinweis - ST Microelectronics

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M48T08-100PC1 Anwendungshinweis

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AN1009
Application note
Negative undershoot NVRAM data corruption
Introduction
Miniaturization in microelectronics has led, inevitably, to the inadvertent appearance of parasitic
devices. Adjacent conducting paths end up being separated by a gap that is so narrow that it ceases to
isolate them properly from each other. Parasitic tunnelling devices, bipolar transistors, and thyristors
end up being formed, with each one causing its own distinctive misbehavior.
The occurrence of parasitic SCRs (silicon controlled rectifiers) causes the well-studied problem of
latchup. The occurrence of parasitic bipolar transistors, such as the one shown in Figure 1: "Cross-
section of an NPN parasitic bipolar transistor", is normally less serious, but leads to a particular type of
problem in battery-powered circuits. It is this problem that is addressed in this document.
The problem manifests itself in battery-powered memory as data corruption: the unintentional flipping
from 1 to 0, or from 0 to 1, of bits of data in the memory array. It is caused when a negative pulse is
inadvertently applied to the emitter of an inadvertently formed parasitic bipolar transistor, causing it to go
into conduction mode, and to connect two otherwise isolated signal lines.
October 2013 DocID006391 Rev 2 1/7
www.st.com
Verzeichnis

M48T08-100PC1 Datenblatt-PDF

M48T08-100PC1 Datenblatt PDF
ST Microelectronics
31 Seiten, 493 KB
M48T08-100PC1 Anderes Datenblatt
ST Microelectronics
27 Seiten, 1353 KB
M48T08-100PC1 Anwendungshinweis
ST Microelectronics
7 Seiten, 83 KB
M48T08-100PC1 Andere Referenzen
ST Microelectronics
1 Seiten, 124 KB

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