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DS1706TEUA+ Anwendungshinweis - Maxim Integrated

  • Hersteller:
    Maxim Integrated
  • Kategorie:
    Power Monitor
  • Fallpaket
    TSSOP-8
  • Beschreibung:
    Processor Supervisor 3.08V 3.3V/5V 8Pin uMAX
Aktualisierte Uhrzeit: 2024-08-09 19:16:40 (UTC+8)

DS1706TEUA+ Anwendungshinweis

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Maxim > Design Support > Technical Documents > Application Notes > Power-Supply Circuits > APP 245
Keywords: voltage hysteresis, power monitoring, power fail circuitry, power fail, CPU supervisor, CPU
super, reset
APPLICATION NOTE 245
Adding Hysteresis to CPU Supervisor Voltage
Sense Inputs Monitoring Upstream Voltage
Supplies for Power-Fail Warnings
Jun 03, 2003
Abstract: One of the most important features in any embedded design is ensuring that important data is
properly saved and the system reaches a safe/known state as power is failing. A CPU supervisor with a
voltage sense input can monitor an upstream voltage supply and provide a warning signal to the
microprocessor that signifies that power is failing. This allows the microprocessor time to save critical
data and reach a safe/known state before the CPU supervisor, which will also be monitoring the
processor's power supply, resets the processor. This application note shows how to add hysteresis to the
upstream voltage supply's trip level, which prevents the power-fail warning signal from chattering due to
noise. This circuit provides a great tool for producing a sophisticated power-supply monitoring system
that will help to produce a robust embedded design.
CPU Supervisor Basics
Basic CPU supervisors monitor a processor's V
CC
, and reset the processor when V
CC
drops below a
predetermined level, V
CCTP
. V
CCTP
is generally 5-20% below the nominal V
CC
value. This function
prevents the processor from operating when V
CC
is below the processor's specified voltage supply
range. Most CPU supervisors also provide a reset delay that holds the processor's reset line active for
several milliseconds after V
CC
has reached its specified value. This allows reset to be held active for a
short time after power is applied to the processor for peripherals to ready for communication, and it
provides a chance for the power supply to stabilize before the processor begins execution.
By themselves, these functions help to produce a reasonably robust power monitoring system; however,
problems can still arise as power is failing because the reset line will be immediately set active as soon
as V
CC
drops below V
CCTP
. Because there is no warning signal to allow the processor to save important
data and reach a safe state, there is no way to ensure the system is ready for the reset to occur.
Voltage Sense Inputs
The voltage sense inputs within CPU supervisors are comparators that have internal temperature and
voltage compensated references. The internal reference voltage (referenced as V
REF
in the equations
below) is typically either 1.25V or 2.5V. By using the voltage sense input with an external voltage divider,
the supervisor can provide an adjustable trip level monitor that can detect high voltages. Figure 1 shows
a classic voltage monitor with no hysteresis. In this circuit the non-maskable interrupt output ("NMI-bar")
is asserted whenever V
IN
drops below the V
IN
trip level (V
INTP
) calculated using Equation 1.
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