AN-1075
APPLICATION NOTE
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Synchronous Inverse SEPIC Using the ADP1870/ADP1872 Provides High Efficiency
for Noninverting Buck/Boost Applications
by Matthew C. Kessler
Rev. B | Page 1 of 12
INTRODUCTION
In many markets, demand is increasing for efficient noninverting
dc-to-dc converters that can operate in either buck or boost
mode, decreasing or increasing the input voltage to a desired
regulated voltage, with minimal cost, component count, and
power loss. The inverse single-ended primary inductor conver-
ter (SEPIC), also known as the Zeta converter, has many properties
that make it ideal for this function (see Figure 1). An analysis of
its operation and implementation with the ADP1870/ADP1872
synchronous switching controllers reveals its useful properties
for this application.
INVERSE SEPIC FUNDAMENTALS
V
IN
V
OUT
C
IN
C
OUT
Qh1
L1A QI1
L1B
Cblk2
09103-001
Figure 1. Inverse-SEPIC Topology
Primary Switch Qh1 and Secondary Switch Ql1 operate in
opposite phase from one another. During the on time, Qh1 is
conducting and Ql1 is off. Current flows in two paths, as shown
in Figure 2. The first is from the input, through the primary
switch, the energy-transfer capacitor (Cblk2), the output
inductor (L1B), and the load, finally returning back to the input
through ground. The second path is from the input, through the
primary switch, the ground-reference inductor (L1A), and back
to the input through ground.
V
I
N
V
OUT
C
IN
C
OUT
L1A
L1B
Cblk2
09103-002
ON TIME (Qh1 CONDUCTING)
Figure 2. Current-Flow Diagram—Qh1 Closed and Ql1 Open
During the off time, the switch positions are reversed. Ql1 is
conducting, and Qh1 is off. The input capacitor (C
IN
) is discon-
nected, but current continues to flow through the inductors in
two paths, as shown in Figure 3. The first is from the output
inductor, through the load, through ground, and back to the
output inductor through the secondary switch. The second path
is from the ground-reference inductor, through the energy-transfer
capacitor, the secondary switch, and back to the ground-reference
inductor.
V
IN
V
OUT
C
IN
C
OUT
L1A
L1B
Cblk2
09103-003
OFF TIME (Ql1 CONDUCTING)
Figure 3. Current Flow Diagram—Ql1 Closed and Qh1 Open
By applying the principles of inductor volt-second balance and
capacitor charge balance, the user finds the equilibrium dc
conversion ratio specified in Equation 1.
D
D
V
V
IN
OUT
−
=
1
(1)
where D is the duty cycle of the converter (on-time fraction of
the switching cycle).
Equation 1 suggests that if the duty cycle is more than 0.5, a
higher voltage is regulated at the output (boost); if the duty
cycle is less than 0.5, the regulated voltage is lower (buck).
Other relevant results of this analysis are that the steady-state
voltage across the energy-transfer capacitor (Cblk2) is equal to
V
OUT
in a lossless system; the dc value of the current through the
output inductor (L1B) is equal to I
OUT
; and the dc value of the
current through the ground-reference inductor (L1A) is I
OUT
×
V
OUT
/V
IN
. The energy-transfer capacitor also provides dc
blocking from V
IN
to V
OUT
. This property can be attractive when
there is a risk of a shorted output.
The analysis also shows that the output current in the inverse
SEPIC is continuous, yielding a lower peak-to-peak output
voltage ripple for a given output capacitor impedance. This
allows the use of smaller, less costly output capacitors as com-
pared to discontinuous output current topologies.
()
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−
=
D
D
V
V
in
out
1
Verzeichnis
- ・ Blockdiagramm on Seite 10
- ・ Anwendungsbereich on Seite 1
